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Brad Appel
Publication Activity (10 Years)
Years Active: 2015-2019
Publications (10 Years): 4
Top Topics
Memory Size
Cmos Technology
Low Voltage
Wide Range
Top Venues
ISSCC
VLSI Circuits
IEEE J. Solid State Circuits
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Publications
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Francois Atallah
,
Keith A. Bowman
,
Hoan Nguyen
,
Jihoon Jeong
,
Daniel Yingling
,
Yu Sun
,
Brad Appel
,
Anthony Polomik
,
Mahesh Harinath
,
Joshua Morelli
,
Thomas Moore
,
Nathaniel Reeves
,
Amer Cassier
,
Arijit Raychowdhury
A 7nm All-Digital Unified Voltage and Frequency Regulator Based on a High-Bandwidth 2-Phase Buck Converter with Package Inductors.
ISSCC
(2019)
Keith A. Bowman
,
Samantak Gangopadhyay
,
Francois Atallah
,
Hoan Nguyen
,
Jihoon Jeong
,
Daniel Yingling
,
Anthony Polomik
,
Mahesh Harinath
,
Nathaniel Reeves
,
Amer Cassier
,
Brad Appel
,
Arijit Raychowdhury
A 7nm Leakage-Current-Supply Circuit for LDO Dropout Voltage Reduction.
VLSI Circuits
(2019)
Hoan Nguyen
,
Jihoon Jeong
,
Francois Atallah
,
Marc Jansen
,
Anthony Polomik
,
Daniel Yingling
,
Harsha Akkaraju
,
Brad Appel
,
Rahul Nadkarni
,
Keith A. Bowman
A 7NM Double-Pumped 6R6W Register File for Machine Learning Memory.
VLSI Circuits
(2018)
Keith A. Bowman
,
Sarthak Raina
,
Todd Bridges
,
Daniel Yingling
,
Hoan Nguyen
,
Brad Appel
,
Yesh Kolla
,
Jihoon Jeong
,
Francois Atallah
,
David Hansquine
A 16 nm All-Digital Auto-Calibrating Adaptive Clock Distribution for Supply Voltage Droop Tolerance Across a Wide Operating Range.
IEEE J. Solid State Circuits
51 (1) (2016)
Keith A. Bowman
,
Sarthak Raina
,
Todd Bridges
,
Daniel Yingling
,
Hoan Nguyen
,
Brad Appel
,
Yesh Kolla
,
Jihoon Jeong
,
Francois Atallah
,
David Hansquine
8.5 A 16nm auto-calibrating dynamically adaptive clock distribution for maximizing supply-voltage-droop tolerance across a wide operating range.
ISSCC
(2015)