Bita Gorjiara

Publication Activity (10 Years)

Years Active: 2004-2008
Publications (10 Years): 0

Publications

Bita Gorjiara, Daniel Gajski
Automatic architecture refinement techniques for customizing processing elements. DAC (2008)
Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski
C-based design flow: a case study on G.729A for voice over internet protocol (VoIP). DAC (2008)
Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski
Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs. ACM Trans. Reconfigurable Technol. Syst. 1 (2) (2008)
Bita Gorjiara, Daniel Gajski
A novel profile-driven technique for simultaneous power and code-size optimization of microcoded IPs. ICCD (2007)
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost. ASP-DAC (2007)
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
Ultra-fast and efficient algorithm for energy optimization by gradient-based stochastic voltage and task scheduling. ACM Trans. Design Autom. Electr. Syst. 12 (4) (2007)
Bita Gorjiara, Daniel Gajski
FPGA-friendly code compression for horizontal microcoded custom IPs. FPGA (2007)
Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski
A Graph Based Algorithm for Data Path Optimization in Custom Processors. DSD (2006)
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski
Generic netlist representation for system and PE level design exploration. CODES+ISSS (2006)
Bita Gorjiara, Mehrdad Reshadi, Daniel D. Gajski
Designing a custom architecture for DCT using NISC technology. ASP-DAC (2006)
Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski
Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths . ICCD (2006)
Mehrdad Reshadi, Bita Gorjiara, Nikil D. Dutt
Generic Processor Modeling for Automatically Generating Very Fast Cycle-Accurate Simulators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (12) (2006)
Bita Gorjiara, Daniel D. Gajski
Custom Processor Design Using NISC: A Case-Study on DCT algorithm. ESTIMedia (2005)
Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski
Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths. ICCD (2005)
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes. ISLPED (2004)
Bita Gorjiara, Pai H. Chou, Nader Bagherzadeh, Mehrdad Reshadi, David W. Jensen
Fast and efficient voltage scheduling by evolutionary slack distribution. ASP-DAC (2004)