FPGA-friendly code compression for horizontal microcoded custom IPs.
Bita GorjiaraDaniel GajskiPublished in: FPGA (2007)
Keyphrases
- domain specific
- high speed
- image compression
- low cost
- source code
- data compression
- real time image processing
- compression ratio
- compression rate
- hardware implementation
- lossless compression
- real time
- compression algorithm
- compression scheme
- field programmable gate array
- single chip
- signal processing
- fpga implementation
- application specific
- data flow
- hardware design
- parallel architecture
- arithmetic coding
- hardware architecture
- code generation
- software implementation
- digital signal
- systolic array