Bheemappa Halavar

Publication Activity (10 Years)

Years Active: 2018-2020
Publications (10 Years): 6

Top Topics

Multi Processor

Evaluation Methodologies

Rotation Invariant

Network On Chip

Top Venues

Comput. Electr. Eng.

Simul. Model. Pract. Theory

Publications

Bheemappa Halavar, Basavaraj Talawar
Power and performance analysis of 3D network-on-chip architectures. Comput. Electr. Eng. 83 (2020)
Bheemappa Halavar, Ujjwal Pasupulety, Basavaraj Talawar
Extending BookSim2.0 and HotSpot6.0 for power, performance and thermal evaluation of 3D NoC architectures. Simul. Model. Pract. Theory 96 (2019)
Bheemappa Halavar, Basavaraj Talawar
OP3DBFT: A Power and Performance Optimal 3D BFT NoC Architecture. ISDA (1) (2018)
Bheemappa Halavar, Basavaraj Talawar
Floorplan Based Performance Evaluation of 3D Variants of Mesh and BFT Networks-on-Chip. SPCOM (2018)
Ujjwal Pasupulety, Bheemappa Halavar, Basavaraj Talawar
Thermal Aware Design for Through-Silicon Via (TSV) based 3D Network-on-Chip (NoC) Architectures. ISED (2018)
Ujjwal Pasupulety, Bheemappa Halavar, Basavaraj Talawar
Accurate Power and Latency Analysis of a Through-Silicon Via(TSV). ICACCI (2018)