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Thermal Aware Design for Through-Silicon Via (TSV) based 3D Network-on-Chip (NoC) Architectures.
Ujjwal Pasupulety
Bheemappa Halavar
Basavaraj Talawar
Published in:
ISED (2018)
Keyphrases
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network on chip
packet switched
cmos technology
routing algorithm
real time
power dissipation
design process
multi processor
wireless sensor networks
high speed
design methodology
network simulator