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Bheema Rao Nistala
ORCID
Publication Activity (10 Years)
Years Active: 2017-2023
Publications (10 Years): 5
Top Topics
High Density
Mathematical Analysis
Noisy Channel
Neural Network
Top Venues
Turkish J. Electr. Eng. Comput. Sci.
VLSID
Microelectron. J.
iSES
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Publications
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Thota Pranay Kumar
,
Siva Kumar Rapina
,
Bheema Rao Nistala
A 16Gbps 3rd Order CTLE Design for Serial Links with High Channel Loss in 16nm FinFET.
VLSID
(2023)
Sunitha Bhukya
,
Bheema Rao Nistala
Design optimization of junctionless bottom spacer tapered FinFET: Device to circuit level implementation.
Microelectron. J.
139 (2023)
Praveen Kumar Mudidhe
,
Bheema Rao Nistala
Performance Analysis of Dual Material Graded Channel Cylindrical Gate All Around (DMGC CGAA) FET with Source/Drain Underlap.
iSES
(2022)
Akhendra Kumar Padavala
,
Bheema Rao Nistala
Design of an on-chip Hilbert fractal inductor using an improved feed forward neural network for Si RFICs.
Turkish J. Electr. Eng. Comput. Sci.
26 (5) (2018)
Akhendra Kumar Padavala
,
Bheema Rao Nistala
High inductance fractal inductors for wireless applications.
Turkish J. Electr. Eng. Comput. Sci.
25 (2017)