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Design optimization of junctionless bottom spacer tapered FinFET: Device to circuit level implementation.
Sunitha Bhukya
Bheema Rao Nistala
Published in:
Microelectron. J. (2023)
Keyphrases
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circuit design
high speed
database
decision trees
hardware implementation
information retrieval
genetic algorithm
multi agent
higher level
efficient implementation
finite element
high density
levels of abstraction
implementation issues
equivalent circuit