Ashok Kumar Palaniswamy

Publication Activity (10 Years)

Years Active: 2008-2016
Publications (10 Years): 1

Top Topics

Fault Diagnosis

Power Dissipation

Heuristic Solution

Top Venues

ACM J. Emerg. Technol. Comput. Syst.

ACM Great Lakes Symposium on VLSI

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Ashok Kumar Palaniswamy, Spyros Tragoudas, Themistoklis Haniotakis
ATPG for Delay Defects in Current Mode Threshold Logic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (11) (2016)
Ashok Kumar Palaniswamy, Spyros Tragoudas, Themistoklis Haniotakis
ATPG for transition faults of pipelined threshold logic circuits. DTIS (2014)
Ashok Kumar Palaniswamy, Spyros Tragoudas
Improved Threshold Logic Synthesis Using Implicant-Implicit Algorithms. ACM J. Emerg. Technol. Comput. Syst. 10 (3) (2014)
Ashok Kumar Palaniswamy, Spyros Tragoudas
An efficient heuristic to identify threshold logic functions. ACM J. Emerg. Technol. Comput. Syst. 8 (3) (2012)
Ashok Kumar Palaniswamy, Spyros Tragoudas
A scalable threshold logic synthesis method using ZBDDs. ACM Great Lakes Symposium on VLSI (2012)
Ashok Kumar Palaniswamy, Manoj Kumar Goparaju, Spyros Tragoudas
Scalable identification of threshold logic functions. ACM Great Lakes Symposium on VLSI (2010)
Manoj Kumar Goparaju, Ashok Kumar Palaniswamy, Spyros Tragoudas
A Fault Tolerance Aware Synthesis Methodology for Threshold Logic Gate Networks. DFT (2008)