Aria Eshraghi

Publication Activity (10 Years)

Years Active: 1994-2019
Publications (10 Years): 1

Top Topics

Channel Estimation

Hardware Software Partitioning

Multiple Input Multiple Output

Top Venues

Publications

Vito Giannini, Marius Goldenberg, Aria Eshraghi, James Maligeorgos, Lysander Lim, Ryan Lobo, Dave Welland, Chung-Kai Chow, Andrew Dornbusch, Tim Dupuis, Struan Vaz, Fred Rush, Paul Bassett, Hong Kim, Monier Maher, Otto Schmid, Curtis Davis, Manju V. Hegde
A 192-Virtual-Receiver 77/79GHz GMSK Code-Domain MIMO Radar System-on-Chip. ISSCC (2019)
Aria Eshraghi, Terri S. Fiez
A comparative analysis of parallel delta-sigma ADC architectures. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2004)
Aria Eshraghi, Terri S. Fiez
A time-interleaved parallel /ΔΣ A/D converter. IEEE Trans. Circuits Syst. II Express Briefs 50 (3) (2003)
Uma Chilakapati, Terri S. Fiez, Aria Eshraghi
A CMOS transconductor with 80-dB SFDR up to 10 MHz. IEEE J. Solid State Circuits 37 (3) (2002)
Uma Chilakapati, Terri S. Fiez, Aria Eshraghi
A 3.3 V transconductor in 0.35 μm CMOS with 80 dB SFDR up to 10 MHz. CICC (2001)
Russell E. Radke, Aria Eshraghi, Terri S. Fiez
A 14-bit current-mode ΣΔ DAC based upon rotated data weighted averaging. IEEE J. Solid State Circuits 35 (8) (2000)
Russell E. Radke, Aria Eshraghi, Terri S. Fiez
A spurious-free delta-sigma DAC using rotated data weighted averaging. CICC (1999)
Eric T. King, Aria Eshraghi, Ian Galton, Terri S. Fiez
A Nyquist-rate delta-sigma A/D converter. IEEE J. Solid State Circuits 33 (1) (1998)
Farbod Aram, Aria Eshraghi, Terri S. Fiez
Compact and Accurate MOST Model for Analog Circuit Hand Calculations. ISCAS (1994)
Aria Eshraghi, Terri S. Fiez, Kel D. Winters, Thomas R. Fischer
Design of a new squaring function for the Viterbi algorithm. IEEE J. Solid State Circuits 29 (9) (1994)
Aria Eshraghi, Terri S. Fiez, Thomas R. Fischer
Asynchronus Implementation for the Add Compare Select Processor for Communication Systems. ISCAS (1994)