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Anil Chawda
Publication Activity (10 Years)
Years Active: 2014-2016
Publications (10 Years): 1
Top Topics
Metadata
Denoising
Phase Locked Loop
Digital Curves
Top Venues
ICECS
VLSI Design
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Publications
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Pallavi Paliwal
,
Jaydip Fadadu
,
Anil Chawda
,
Shalabh Gupta
A Fast Settling 4.7-5 GHz Fractional-N Digital Phase Locked Loop.
VLSI Design
(2016)
Anil Chawda
,
Pallavi Paliwal
,
Priyank Laad
,
Shalabh Gupta
High resolution digital-to-time converter for low jitter digital PLLs.
ICECS
(2014)