Andrzej Pulka

Publication Activity (10 Years)

Years Active: 1999-2023
Publications (10 Years): 5

Top Topics

Architectural Model

Search Strategies

Propositional Satisfiability

Top Venues

IET Circuits Devices Syst.

Microprocess. Microsystems

Publications

Ernest Antolak, Andrzej Pulka
Validation of Task Scheduling Techniques in Multithread Time Predictable Systems. IEEE Access 11 (2023)
Ernest Antolak, Andrzej Pulka
Energy-Efficient Task Scheduling in Design of Multithread Time Predictable Real-Time Systems. IEEE Access 9 (2021)
Ernest Antolak, Andrzej Pulka
Flexible hardware approach to multi-core time-predictable systems design based on the interleaved pipeline processing. IET Circuits Devices Syst. 14 (5) (2020)
Andrzej Malcher, Adam Kristof, Andrzej Pulka
Digitally programmable modified current differencing transconductance amplifier in 40-nm technology: design flow, parameter analyses and applications. IET Circuits Devices Syst. 14 (8) (2020)
Andrzej Pulka
Preface. Microprocess. Microsystems 44 (2016)
Andrzej Pulka
Selection of search strategies for solving 3-SAT problems. Int. J. Appl. Math. Comput. Sci. 24 (2) (2014)
Lukasz Golly, Andrzej Pulka
Analysis of timing resources for highly predictable real-time systems models. MIXDES (2013)
Andrzej Pulka, Adam Milik
Dynamic rescheduling of tasks in time predictable embedded systems. PDeS (2012)
Adam Milik, Andrzej Pulka
Automatic implementation of arithmetic operation in reconfigurable logic controllers. ECCTD (2011)
Adam Milik, Andrzej Pulka
On efficient implementation of search algorithm for genome patterns. PDeS (2010)
Adam Milik, Andrzej Pulka
The reconfigurable hardware accelerator for searching genome patterns. PDeS (2009)
Andrzej Pulka, Lukasz Golly
A heterogenous approach to symbolic calculations based on structural numbers. ICECS (2009)
Andrzej Pulka, Adam Milik
Multithread RISC architecture based on programmable interleaved pipelining. ICECS (2009)
Andrzej Pulka, Adam Milik
VEST - An Intelligent Tool for Timing SoCs Verification Using UML Timing Diagrams. FDL (2008)
Andrzej Pulka
A Heuristic Fault Dictionary Reduction Methodology. ICECS (2007)
Andrzej Pulka, Jerzy Rutkowski
A common-sense based approach to the automated test-point selection in fault diagnosis. ECCTD (2007)
Adam Milik, Andrzej Pulka
Common HDL-Matlab Simulation Environment. FDL (2007)
Andrzej Pulka
SystemC models generation based on libraries of templates. ISCAS (2006)
Jerzy J. Dabrowski, Andrzej Pulka
Experiences with Modeling of Analog and Mixed A/D Systems Based on PWL Technique. DATE (1999)