Multithread RISC architecture based on programmable interleaved pipelining.

Andrzej Pulka Adam Milik

Published in: ICECS (2009)

Keyphrases

instruction set
hardware architecture
low cost
processor array
management system
network architecture
digital signal processors
layered architecture
architectural design
reference model
general purpose
real time
operating system
multi agent systems
database systems
artificial intelligence
signal processor
data sets