Alexandre F. Tenca

Publication Activity (10 Years)

Years Active: 1997-2011
Publications (10 Years): 0

Publications

João Carlos Néto, Alexandre F. Tenca, Wilson Vicente Ruggiero
A parallel k-partition method to perform Montgomery Multiplication. ASAP (2011)
Alexandre F. Tenca
Multi-operand Floating-Point Addition. IEEE Symposium on Computer Arithmetic (2009)
Alexandre F. Tenca, Song Park, Lo'ai Ali Tawalbeh
Carry-Save Representation Is Shift-Unsafe: The Problem and Its Solution. IEEE Trans. Computers 55 (5) (2006)
Adnan Abdul-Aziz Gutub, Alexandre F. Tenca
). Integr. 37 (2) (2004)
R. Galli, Alexandre F. Tenca
A design methodology for networks of online modules and its application to the Levinson-Durbin algorithm. IEEE Trans. Very Large Scale Integr. Syst. 12 (1) (2004)
Alexandre F. Tenca, Ajay C. Shantilal, Mohammed H. Sinky
Improved-Throughput Networks of Basic On-Line Arithmetic Modules for DSP Applications. ASAP (2004)
Lo'ai Ali Tawalbeh, Alexandre F. Tenca
). ASAP (2004)
Alexandre F. Tenca, Çetin Kaya Koç
A Scalable Architecture for Modular Multiplication Based on Montgomery's Algorithm. IEEE Trans. Computers 52 (9) (2003)
Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, Çetin Kaya Koç
Scalable VLSI Architecture for GF(p) Montgomery Modular Inverse Computation. ISVLSI (2002)
Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, Erkay Savas, Çetin Kaya Koç
Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2). CHES (2002)
Alexandre F. Tenca, Georgi Todorov, Çetin Kaya Koç
High-Radix Design of a Scalable Modular Multiplier. CHES (2001)
Alexandre F. Tenca, Syed Ubaid Hussaini
A Design of Radix-2 On-line Division Using LSA Organization. IEEE Symposium on Computer Arithmetic (2001)
Erkay Savas, Alexandre F. Tenca, Çetin Kaya Koç
). CHES (2000)
Alexandre F. Tenca, Çetin Kaya Koç
A Scalable Architecture for Montgomery Multiplication. CHES (1999)
Alexandre F. Tenca, Milos D. Ercegovac
On the Design of High-Radix On-Line Division for Long Precision. IEEE Symposium on Computer Arithmetic (1999)
Alexandre F. Tenca, Milos D. Ercegovac
A Variable Long-Precision Arithmetic Unit Design for Reconfigurable Coprocessor Architectures. FCCM (1998)
Mircea R. Stan, Alexandre F. Tenca, Milos D. Ercegovac
Long and Fast Up/Down Counters. IEEE Trans. Computers 47 (7) (1998)
Alexandre F. Tenca, Milos D. Ercegovac
Synchronous Up/Down Binary Counter for LUT FPGAs with Counting Frequency Independent of Counter Size. FPGA (1997)