Synchronous Up/Down Binary Counter for LUT FPGAs with Counting Frequency Independent of Counter Size.

Alexandre F. Tenca Milos D. Ercegovac

Published in: FPGA (1997)

Keyphrases

information systems
multiresolution
data sets
neural network
data mining
information retrieval
genetic algorithm
multiscale
computational complexity
evolutionary algorithm
digital images
low cost
standard deviation
non binary