Ahmed M. Shams

Publication Activity (10 Years)

Years Active: 1998-2006
Publications (10 Years): 0

Publications

Ahmed M. Shams, Archana Chidanandan, Wendi Pan, Magdy A. Bayoumi
NEDA: a low-power high-performance DCT architecture. IEEE Trans. Signal Process. 54 (3) (2006)
Mohamed A. Elgamel, Magdy A. Bayoumi, Ahmed M. Shams, Bertrand Y. Zavidovique
Low Power Full Search Block Matching Motion Estimation Vlsi Architectures. J. Circuits Syst. Comput. 13 (6) (2004)
Ahmed M. Shams, Tarek Darwish, Magdy A. Bayoumi
Performance analysis of low-power 1-bit CMOS full adder cells. IEEE Trans. Very Large Scale Integr. Syst. 10 (1) (2002)
Ahmed M. Shams, Wendi Pan, Archana Chidanandan, Magdy A. Bayoumi
A Low Power High Performance Distributed DCT Architecture. ISVLSI (2002)
Ahmed M. Shams, Mohamed A. Elgamel, Magdy A. Bayoumi
Hybrid Mesh-Based/Block-Based Motion Compensation Architecture. Workshop on Digital and Computational Video (2001)
Mohamed A. Elgamel, Ahmed M. Shams, Xi Xueling, Magdy A. Bayoumi
Enhanced low power motion estimation VLSI architectures for video compression. ISCAS (4) (2001)
Ahmed M. Shams, Magdy A. Bayoumi
A 108 Gbps, 1.5 GHz 1D-DCT Architecture. ASAP (2000)
Ahmed M. Shams, Wendi Pan, Archana Chandanandan, Magdy A. Bayoumi
A high-performance 1D-DCT architecture. ISCAS (2000)
Ahmed M. Shams, Magdy A. Bayoumi
Performance evaluation of 1-bit CMOS adder cells. ISCAS (1) (1999)
Ahmed M. Shams, Magdy A. Bayoumi
A New Full Adder Cell for Low-Power Applications. Great Lakes Symposium on VLSI (1998)