Performance analysis of low-power 1-bit CMOS full adder cells.
Ahmed M. ShamsTarek DarwishMagdy A. BayoumiPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2002)
Keyphrases
- low power
- logic circuits
- power dissipation
- power consumption
- low cost
- high speed
- nm technology
- analog to digital converter
- bit parallel
- cmos technology
- single chip
- digital signal processing
- high power
- image sensor
- wireless transmission
- vlsi circuits
- gate array
- ultra low power
- low power consumption
- delay insensitive
- vlsi architecture
- mixed signal
- power reduction
- signal processor
- power management