Abinash Roy

Publication Activity (10 Years)

Years Active: 2006-2022
Publications (10 Years): 4

Top Topics

Network Routing

Reinforcement Learning

Interactive Exploration

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Rassul Bairamkulov, Abinash Roy, Mahalingam Nagarajan, Vaishnav Srinivas, Eby G. Friedman
SPROUT - Smart Power Routing Tool for Board-Level Exploration and Prototyping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (7) (2022)
Rassul Bairamkulov, Abinash Roy, Mali Nagarajan, Vaishnav Srinivas, Eby G. Friedman
SPROUT - Smart Power ROUting Tool for Board-Level Exploration and Prototyping. DAC (2021)
Rassul Bairamkulov, Eby G. Friedman, Abinash Roy, Mali Nagarajan, Vaishnav Srinivas
Graph-Based Power Network Routing for Board-Level High Performance Systems. ISCAS (2020)
Yi Cao, Andrew B. Kahng, Joseph Li, Abinash Roy, Vaishnav Srinivas, Bangqi Xu
Learning-based prediction of package power delivery network quality. ASP-DAC (2019)
Abinash Roy, Jingye Xu, Masud H. Chowdhury
Analysis of the Impacts of Signal Slew and Skew on the Behavior of Coupled RLC Interconnects for Different Switching Patterns. IEEE Trans. Very Large Scale Integr. Syst. 18 (2) (2010)
Jingye Xu, Vivek Nigam, Abinash Roy, Masud H. Chowdhury
Compound noise separation in digital circuits using blind source separation. Microelectron. J. 39 (8) (2008)
Jingye Xu, Abinash Roy, Masud H. Chowdhury
Optimization technique for flip-flop inserted global interconnect. ISCAS (2008)
Jingye Xu, Abinash Roy, Masud H. Chowdhury
Noise separation in analog integrated circuits using independent component analysis technique. Integr. Comput. Aided Eng. 15 (2) (2008)
Abinash Roy, Masud H. Chowdhury
Analysis of the impacts of signal rise/fall time and skew variations in coupled-RLC interconnects. ISCAS (2008)
Abinash Roy, Jingye Xu, Masud H. Chowdhury
Impacts of signal slew and skew variations on delay uncertainty and crosstalk noise in coupled RLC global interconnects. ICECS (2008)
Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury
Effects of Coupling Capacitance and Inductance on Delay Uncertainty and Clock Skew. DAC (2007)
Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury
Delay and Clock Skew Variation due to Coupling Capacitance and Inductance. ISCAS (2007)
Abinash Roy, Sharada Jha, Masud H. Chowdhury
Accurate Analysis of Switching Patterns in High Speed On-chip Global Interconnects. ICECS (2007)
Jingye Xu, Abinash Roy, Masud H. Chowdhury
Interactive presentation: Analysis of power consumption and BER of flip-flop based interconnect pipelining. DATE (2007)
Jingye Xu, Abinash Roy, Masud H. Chowdhury
Power Consumption Analysis of Flip-flop Based Interconnect Pipelining. ISCAS (2007)
Jingye Xu, Abinash Roy, Masud H. Chowdhury
Power Consumption and BER of Flip-Flop Inserted Global Interconnect. VLSI Design 2007 (2007)
Abinash Roy, Masud H. Chowdhury
Global Interconnect Optimization in the Presence of On-chip Inductance. ISCAS (2007)
Abinash Roy, Masud H. Chowdhury
Impacts of Inductance on the Figures of Merit to Optimize Global Interconnect. APCCAS (2006)