A. David Selvakumar

Publication Activity (10 Years)

Years Active: 2004-2021
Publications (10 Years): 2

Top Topics

Data Conversion

Instruction Set

Parallel Processors

Arithmetic Operations

Top Venues

Publications

Sandra Jean, Aneesh Raveendran, A. David Selvakumar, Gagandeep Kaur, Shankar G. Dharani, Shashikala Gunderao Pattanshetty, Vivian Desalphine
P-FMA: A Novel Parameterized Posit Fused Multiply-Accumulate Arithmetic Processor. VLSI Design (2021)
Aneesh Raveendran, Sandra Jean, J. Mervin, Vivian Desalphine, A. David Selvakumar
RISC-V Half Precision Floating Point Instruction Set Extensions and Co-processor. VDAT (2019)
Vinayak Patil, Aneesh Raveendran, P. M. Sobha, A. David Selvakumar, Vivian Desalphine
Out of order floating point coprocessor for RISC V ISA. VDAT (2015)
Aneesh Raveendran, Vinayak Patil, Vivian Desalphine, P. M. Sobha, A. David Selvakumar
RISC-V out-of-order data conversion co-processor. VDAT (2015)
Chester Rebeiro, A. David Selvakumar, A. S. L. Devi
Bitslice Implementation of AES. CANS (2006)
A. David Selvakumar, Chester Rebeiro, R. Pitchiah
SCADA with Fault Tolerant CORBA on Fault Tolerant LANE ATM. IPDPS (2005)
A. David Selvakumar, P. M. Sobha, G. C. Ravindra, R. Pitchiah
Design, Implementation and Performance of Fault-Tolerant Message Passing Interface (MPI). PDCS (2004)