Reconfigurable Turbo Decoder With Parallel Architecture for 3GPP LTE System.
Cheng-Chi WongHsie-Chia ChangPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2010)
Keyphrases
- parallel architecture
- long term evolution
- systolic array
- turbo codes
- hardware implementation
- distributed video coding
- cellular networks
- fourth generation
- parallel processing
- low complexity
- video streaming
- high level synthesis
- error correction
- channel coding
- pricing model
- parallel implementation
- shared memory
- synthetic aperture sonar
- error concealment
- signal processing
- low cost
- wireless communication
- wireless networks
- video codec
- processing elements
- efficient implementation
- data flow
- computer vision
- transform domain