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A 1.7 GHz Fractional-N Frequency Synthesizer Based on a Multiplying Delay-Locked Loop.

Salvatore LevantinoGiovanni MarucciGiovanni MarzinAndrea FenaroliCarlo SamoriAndrea L. Lacaita
Published in: IEEE J. Solid State Circuits (2015)
Keyphrases
  • clock frequency
  • dielectric constant
  • power consumption
  • low frequency
  • high speed
  • frequency band
  • text to speech
  • database
  • real time
  • data sets
  • case study
  • fractional order
  • intel xeon
  • phase locked loop