A 54.4-90 GHz Low-Noise Amplifier in 65-nm CMOS.

Yiming Yu Huihua Liu Yunqiu Wu Kai Kang

Published in: IEEE J. Solid State Circuits (2017)

Keyphrases

high speed
high noise
low signal to noise ratio
power consumption
high sensitivity
random noise
low power
cmos technology
noisy data
nm technology
silicon on insulator
real time
metal oxide
power supply
noise level
signal to noise ratio
missing data
noise reduction
low voltage
low cost