Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC.
Ming-Dou KerChung-Yu WuTao ChengHun-Hsien ChangPublished in: IEEE Trans. Very Large Scale Integr. Syst. (1996)
Keyphrases
- low voltage
- cmos technology
- mixed signal
- low power
- vlsi circuits
- single chip
- integrated circuit
- power line
- circuit design
- electron beam
- power consumption
- design considerations
- random access memory
- high speed
- low cost
- power management
- design methodology
- short circuit
- power dissipation
- hardware implementation
- physical design
- power supply
- image sensor
- transmission line
- data management