Leakage Minimization Technique for Nanoscale CMOS VLSI.

Kyung Ki Kim Yong-Bin Kim Minsu Choi Nohpill Park

Published in: IEEE Des. Test Comput. (2007)

Keyphrases

vlsi circuits
high speed
single chip
chip design
power dissipation
low power
focal plane
objective function
circuit design
power consumption
vlsi design
analog vlsi
signal processing
power supply
low cost
minimization problems
real time
infrared
mechanical properties
geometric interpretation
atomic force microscopy