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A common-mode BIST technique for fully-differential sample-and-hold circuits.

Jun YuanMasayoshi Tachibana
Published in: IEICE Electron. Express (2012)
Keyphrases
  • built in self test
  • high speed
  • circuit design
  • electronic circuits
  • logic synthesis
  • real world
  • machine learning
  • information retrieval
  • multiscale
  • integrated circuit
  • data samples
  • analog circuits
  • delay insensitive