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Logic-in-Memory VLSI circuit for Fully Parallel Nearest Pattern Matching Based on Floating-Gate-MOS Pass-Transistor Logic.
Takahiro Hanyu
Shunichi Kaeriyama
Michitaka Kameyama
Published in:
J. Multiple Valued Log. Soft Comput. (2005)
Keyphrases
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floating gate
pattern matching
bit parallel
high speed
power dissipation
circuit design
flip flops
chip design
regular expressions
matching process
matching strategy
pattern matching algorithm
neural network
query language
string matching