A Low-Noise Analog Frontend with Large PD Capacitance Tolerance in 65-nm CMOS for Optical Receivers.
Jingbo WangTonghui WangXiao YangHong ZhangPublished in: ICTA (2021)
Keyphrases
- focal plane
- high speed
- analog vlsi
- low power
- high noise
- cmos image sensor
- circuit design
- low signal to noise ratio
- image sensor
- noisy data
- solid state
- infrared
- cmos technology
- metal oxide
- mixed signal
- low cost
- noise level
- wide dynamic range
- signal noise ratio
- power consumption
- power supply
- real time
- random noise
- back end
- signal to noise ratio
- single chip
- dynamic range
- imaging systems
- median filter
- floating gate
- unit length
- noise reduction
- metal oxide semiconductor
- nm technology
- analog to digital converter
- image enhancement
- silicon on insulator