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An optimal gate design for the synthesis of ternary logic circuits.

Sunmean KimTaeho LimSeokhyeong Kang
Published in: ASP-DAC (2018)
Keyphrases
  • logic circuits
  • functional decomposition
  • logic synthesis
  • optimal design
  • case study
  • design process
  • efficient implementation
  • low power
  • tunnel diode
  • user interface