A 40-to-80MHz Sub-4μW/MHz ULV Cortex-M0 MCU SoC in 28nm FDSOI With Dual-Loop Adaptive Back-Bias Generator for 20μs Wake-Up From Deep Fully Retentive Sleep Mode.
David BolMaxime SchrammeLudovic MoreauThomas HainePengcheng XuCharlotte FrenkelRemi DekimpeFrançois StasDenis FlandrePublished in: ISSCC (2019)