Constructing Depth-Optimum Circuits for Adders and AND-OR Paths.

Ulrich Brenner Anna Hermann Jannik Silvanus

Published in: CoRR (2020)

Keyphrases

high speed
delay insensitive
shortest path
depth map
depth information
three dimensional
global optimum
path finding
digital circuits
tunnel diode
data sets
path length
asynchronous circuits
vlsi circuits
bit parallel