Deterministic identity testing paradigms for bounded top-fanin depth-4 circuits.

Pranjal Dutta Prateek Dwivedi Nitin Saxena

Published in: CoRR (2023)

Keyphrases

black box
depth map
depth information
identity management
case study
test cases
database
neural network
state space
high speed
test set
digital circuits
analog circuits
logic circuits
delay insensitive
logic synthesis