Low Delay 4K 120fps HEVC Decoder with Parallel Processing Architecture.
Ken NakamuraDaisuke KobayashiYuya OmoriTatsuya OsawaTakayuki OnishiKoyo NittaHiroe IwasakiPublished in: IEICE Trans. Electron. (2020)
Keyphrases
- parallel processing
- low delay
- distributed video coding
- video codec
- low complexity
- video coding
- distributed processing
- wyner ziv video coding
- parallel architecture
- real time
- computational power
- wyner ziv
- parallel computers
- video coding standard
- video compression
- coding efficiency
- rate distortion
- motion compensated
- bit rate
- motion estimation
- transform domain
- coding scheme
- high speed
- video quality
- rate control
- error resilience
- graphic processing unit
- rate allocation
- bit plane
- compression efficiency
- motion compensation
- intra prediction
- turbo codes
- macroblock
- video coding scheme
- parallel algorithm
- image sequences