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Interconnect Delay and Power Optimization by Module Duplication for Integration of High Level Synthesis and Floorplan.
Zhipeng Liu
Jinian Bian
Qiang Zhou
Hui Dai
Published in:
ISVLSI (2007)
Keyphrases
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high level synthesis
power dissipation
design space exploration
power consumption
optimization algorithm
optimization problems
high speed
neural network
bayesian networks
multi agent
multi agent systems
scheduling problem
computer architecture