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Diagnosing At-Speed Scan BIST Circuits Using a Low Speed and Low Memory Tester.
Yoshiyuki Nakamura
Thomas Clouqueur
Kewal K. Saluja
Hideo Fujiwara
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2007)
Keyphrases
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low memory
high speed
multiscale
feature extraction
multiresolution
coding scheme