FPGA Implementation of a High-Speed Stereo Matching Processor Based on Recursive Computation.
Masanori HariyamaKeita TanjiMichitaka KameyamaPublished in: ERSA (2009)
Keyphrases
- stereo matching
- high speed
- fpga implementation
- stereo images
- stereo vision
- belief propagation
- dynamic programming
- depth map
- hardware implementation
- stereo matching algorithm
- disparity map
- occlusion handling
- stereo correspondence
- image matching
- stereo pair
- dense stereo matching
- real time
- ground control points
- post processing
- search range
- stereo algorithm
- field programmable gate array
- depth information
- message passing
- frame rate
- parallel processing
- multi view
- image registration
- high quality
- image sequences
- three dimensional