A 10-b 30-MS/s low-power pipelined CMOS A/D converter using a pseudodifferential architecture.
Daisuke MiyazakiShoji KawahitoMasanori FurutaPublished in: IEEE J. Solid State Circuits (2003)
Keyphrases
- low power
- cmos technology
- power consumption
- vlsi architecture
- low voltage
- low cost
- high speed
- analog to digital converter
- mixed signal
- nm technology
- vlsi circuits
- high power
- single chip
- image sensor
- digital signal processing
- real time
- power management
- signal processor
- logic circuits
- wireless transmission
- cmos image sensor
- low power consumption
- power dissipation
- data flow
- video sequences
- digital circuits
- digital camera
- design methodology
- signal processing
- wireless sensor networks