A 23mW 24GS/s 6b Time-interleaved hybrid two-step ADC in 28nm CMOS.

Benwei Xu Yuan Zhou Yun Chiu

Published in: VLSI Circuits (2016)

Keyphrases

power consumption
power supply
hd video
low power
cmos technology
post processing
nm technology
analog to digital converter
silicon on insulator
learning environment
video sequences
hybrid learning
hybrid approaches
delay insensitive