Automatic compilation flow for a coarse-grained reconfigurable processor.

Hao Wang Weiguang Sheng Weifeng He

Published in: ASICON (2011)

Keyphrases

coarse grained
fine grained
multithreading
low cost
shared memory
protein sequences
high level
access control
parallel architecture
digital signal
systolic array
artificial intelligence
distributed memory
energy landscape
parallel algorithm