Fault Tolerant Processor Arrays Based on 1 1/2-Track Switch with Generalized Spare Distributions.

Tadayoshi Horita Itsuo Takanami

Published in: ISPAN (1999)

Keyphrases

fault tolerant
fault tolerance
high speed
distributed systems
load balancing
functional verification
dirichlet distribution
safety critical
probability distribution
state machine
fault isolation
high availability
parallel processing