Login / Signup

Design of 1.28-GB/s high bandwidth 2-Mb SRAM for integrated memory array processor applications.

Tohru KimuraKazuyuki NakamuraYoshiharu AimotoTakashi ManabeNobuyuki YamashitaYoshihiro FujitaShin'ichiro OkazakiMasakazu Yamashina
Published in: IEEE J. Solid State Circuits (1995)
Keyphrases
  • high bandwidth
  • array processor
  • natural language processing
  • image processing
  • end to end
  • efficient implementation
  • coarse to fine
  • data transmission