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Clock-Delayed Domino for Adder and Combinational Logic Desig.

Gin YeeCarl Sechen
Published in: ICCD (1996)
Keyphrases
  • high speed
  • power consumption
  • data flow
  • power dissipation
  • logic circuits
  • duty cycle
  • database
  • low power
  • information systems
  • data structure
  • pattern recognition
  • high dimensional
  • scheduling problem