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Clock buffer polarity assignment combined with clock tree generation for power/ground noise minimization.

Yesin RyuTaewhan Kim
Published in: ICCAD (2008)
Keyphrases
  • power consumption
  • duty cycle
  • low power
  • high speed
  • clock frequency
  • tree structure
  • noise level
  • sentiment analysis
  • noise reduction
  • additive noise
  • random noise
  • noise model
  • power dissipation