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Clock Delayed Domino Logic With Efficient Variable Threshold Voltage Keeper.
Amir Amirabadi
Ali Afzali-Kusha
Y. Mortazavi
Mehrdad Nourani
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2007)
Keyphrases
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database
duty cycle
high speed
power consumption
data sets
cost effective
computationally expensive
modal logic
predicate logic
power losses