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SRAM bitline circuits on PD SOI: advantages and concerns.
Jente B. Kuang
Somnuk Ratanaphanyarat
Mary Jo Saccamango
Louis L.-C. Hsu
Roy C. Flaker
Lawrence F. Wagner
Shao-Fu Sanford Chu
Ghavam G. Shahidi
Published in:
IEEE J. Solid State Circuits (1997)
Keyphrases
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random access memory
power consumption
power reduction
low power
power dissipation
data transmission
information systems
high level synthesis
high speed
delay insensitive
analog vlsi
tunnel diode
data sets
chip design
vlsi circuits
logic circuits
advantages and disadvantages
image processing
neural network