A novel CMOS charge-pump circuit with positive feedback for PLL applications.
Esdras Juárez-HernándezAlejandro Díaz-SánchezPublished in: ICECS (2001)
Keyphrases
- positive feedback
- circuit design
- analog vlsi
- high speed
- delay insensitive
- cmos technology
- low voltage
- vlsi circuits
- charge coupled devices
- low power
- power dissipation
- digital circuits
- power consumption
- high pressure
- power supply
- negative feedback
- positive and negative feedback
- low cost
- nm technology
- charge coupled device
- image sensor
- metal oxide semiconductor
- silicon on insulator
- chip design
- learning process