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Efficient Reconfigurable On-Chip Buses for FPGAs.
Dirk Koch
Christian Haubelt
Jürgen Teich
Published in:
FCCM (2008)
Keyphrases
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low cost
hardware implementation
parallel architectures
general purpose
high speed
computationally expensive
genetic algorithm
information systems
floating point
reconfigurable hardware
analog vlsi
reconfigurable architecture