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Investigation of high-performance sub-50 nm junctionless nanowire transistors.
Ran Yan
Abhinav Kranti
Isabelle Ferain
Chi-Woo Lee
Ran Yu
Nima Dehdashti
Pedram Razavi
Jean-Pierre Colinge
Published in:
Microelectron. Reliab. (2011)
Keyphrases
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cmos technology
low power
metal oxide semiconductor
embedded dram
low cost
power consumption
cost effective
high density
integrated circuit
high reliability
circuit design
high efficiency
data sets
case study
digital forensics