Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture.
Ignacio Algredo-BadilloClaudia Feregrino UribeRené CumplidoPublished in: ICCSA (3) (2006)
Keyphrases
- hardware architecture
- hardware design
- hardware architectures
- hardware implementation
- design methodology
- design considerations
- xilinx virtex
- architectural design
- core components
- implementation issues
- parallel architecture
- distributed architecture
- platform independent
- design process
- efficient implementation
- software architecture
- detailed design
- fpga technology
- functional decomposition
- conceptual model
- case study
- modular architecture
- vlsi architecture
- vlsi implementation
- multimedia communication
- memory management
- processing elements
- design goals
- circuit design
- field programmable gate array
- management system
- real time embedded
- real time
- highly modular
- hardware software partitioning