An FPGA-Based Performance Analysis of the Unrolling, Tiling, and Pipelining of the AES Algorithm.
Giacinto Paolo SaggeseAntonino MazzeoNicola MazzoccaAntonio G. M. StrolloPublished in: FPL (2003)
Keyphrases
- detection algorithm
- cost function
- improved algorithm
- recognition algorithm
- dynamic programming
- objective function
- worst case
- probabilistic model
- segmentation algorithm
- theoretical analysis
- computationally efficient
- linear programming
- k means
- preprocessing
- optimal solution
- hardware implementation
- learning algorithm
- times faster
- clustering method
- data sets
- image processing algorithms
- expectation maximization
- input data
- computational cost
- search space
- computational complexity
- face recognition
- genetic algorithm