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TIGER: an efficient timing-driven global router for gate array and standard cell layout design.

Xianlong HongTianxiong XueJin HuangChung-Kuan ChengErnest S. Kuh
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1997)
Keyphrases
  • layout design
  • inter cell
  • gate array