MLC/3LC NAND flash SSD cache with asymmetric error reduction huffman coding for tiered hierarchical storage.
Hikaru WatanabeYoshiaki DeguchiKen TakeuchiPublished in: A-SSCC (2017)
Keyphrases
- storage medium
- error reduction
- flash memory
- storage devices
- solid state
- huffman coding
- file system
- data compression
- random access
- classification error
- main memory
- data storage
- compression ratio
- semi supervised
- b tree
- significant improvement
- database systems
- classification accuracy
- compression algorithm
- feature selection
- training set
- compressed data
- entropy coding
- image compression
- data sets
- feature space
- feature extraction
- machine learning